A D-LDO manages to operate at low voltage and scale with process. Acceleration of the transient response of the D-LDO by a high sampling frequency inevitably undermine the steady-state power consumption, while low sampling frequency operations result in a longer charging/discharging on the output capacitor once an inherent ripple exists on the control word. This ripple is known as limit cycle oscillation (LCO) which incites large, unfavorable output voltage variation.
New methods and systems that achieve minimum LCO amplitude of D-LDO will assist in advancing technological needs and solving technological problems.